Electrostatic discharge (ESD) is the sudden flow of electricity between two objects caused by a contact, an electrical short, or a dielectric breakdown. ESD can be caused by a buildup of static electricity by tribocharging, or by electrostatic induction. ESD includes spectacular electric sparks, but also less dramatic forms which may be neither seen nor heard, yet still be large enough to cause damage to sensitive electronic devices. ESD can cause a range of harmful effects, as well as failure of integrated circuits (ICs).
Electrostatic discharge (“ESD”) protection circuits are needed for ICs. The ESD protection circuits provide a path to bypass current from the terminal to a ground or from the terminal to a power supply rail, so that the current due to an ESD event bypasses the internal circuitry. Voltages far in excess of the normal operating voltages, in both positive and negative magnitudes, are observed during short duration electrostatic discharge events. The ESD protection circuits prevent the corresponding ESD current from destroying sensitive components in the protected IC.
An ESD protection circuit can be triggered in response to a trigger voltage over a threshold, and then safely conduct ESD stress current through an alternative path and thus protect the internal circuitry. After the ESD protection circuit is triggered, it will remain active as long as a voltage over a “holding voltage” is present. If the “holding voltage” for an ESD protection circuit is too low, the ESD protection circuit will likely stay active when the IC is no longer under ESD stress. Accordingly high holding voltages for ESD protection circuits are desirable.
Dynamically triggered MOS transistors are extensively used as ESD protection circuits in low voltage applications for many general purpose IO libraries. However, in high voltage applications, dynamically triggered MOS transistors typically occupy large areas. Furthermore, dynamically triggered MOS transistors are not suitable for applications that have a noisy power. Other alternatives for ESD protection circuits are snapback devices such as silicon controlled rectifier (SCR) circuits and bipolar junction transistors (BJTs), which have smaller silicon areas and reduced leakages. However, the holding voltage of these snapback devices is low in most cases, leading to a large gap between the trigger voltage and the holding voltage. Improved ESD protection circuits are needed with high holding voltages, and reduced gap between the trigger voltage and the holding voltage, which is more suitable for high voltage applications.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the illustrative example embodiments and are not necessarily drawn to scale.